In the earlier Swedish Patent No. SE 153183, C2 referenced herein above, a method is described for encapsulating optocomponents by means of transfer moulding and for achieving at the same time an optical interface in the wall of the capsule. This method was developed based on a conventional encapsulating method for microelectronic circuits, where an electrically conducting leadframe is used for establishing an electric connection to microelectronic circuit chips. The leadframe is usually a punched or etched metal piece, e.g. a thin copper or aluminium sheet. The leadframe comprises a special, suitably adapted portion termed "flag", onto which a microelectronic circuit is mounted before it is moulded into the encapsulating material. Before the moulding embedment, the microcircuit chip is also electrically connected to contact pins of the leadframe by friction welding (ultrasonic welding), "bonding" by means of "bonding" wires.
Moreover, when encapsulating optocomponents an optical interface is to be formed in the wall of the capsule. This, of course, puts additional conditions on the method. The required mechanical accuracy is achieved by mounting the optocomponents on a common carrier or substrate such as a plate, which thereafter is attached to the flag. Finally the carrier is positioned in relation to the external geometry. This is achieved by means of V-grooves on the carrier plate, in which guide pins extending through the mould cavity fit.
However, it can in many cases be difficult to keep, during the moulding embedment, the carrier plate with its guide grooves well engaged with the guide pins, due to the fact that a high pressure is normally required in injection moulding. This pressure can typically be of the magnitude of order of 10-15 bars. Furthermore, the injected material can have a high viscosity, which can also prevent or deteriorate the good alignment of the guide grooves with the guide pins.
Optical fiber connectors having alignment means such as guide pins are disclosed e.g. in U.S. Pat. No. 5,199,093.
In the published European patent applications EP-A2 0 361 283 and EP-A1 0 600 501 typical encapsulated semiconductor devices are disclosed comprising a lead frame.
In the published International patent application WO-A1 93/18456 an integrated circuit package is disclosed having a moulded ring at the edges of the circuit chip enclosing a lead frame. The lead frame has a centrally located flag, having a window and attached to the marginal portions of the bottom side of the chip, the ring and the window allowing access to the bottom side of the chip.
In U.S. Pat. No. 5,233,222 an encapsulated semiconductor device is disclosed having a lead frame comprising a flag, a hole being provided in the flag.
In the published Swedish patent application SE-B 461 456 a mould is disclosed for forming through-holes in a moulded body. The mould has pins engaging at their ends the lower side of a diaphragm, the top side of the diaphragm being subjected to a pressurized fluid.